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Silicon on insulator (SOI) technology refers to the use of a layered silicon–insulator–silicon substrate in place of conventional silicon substrates in semiconductor manufacturing, especially microelectronics, to reduce parasitic device capacitance, thereby improving performance. SOI-based devices differ from conventional silicon-built devices in that the silicon junction is above an electrical insulator, typically silicon dioxide or sapphire (these types of devices are called silicon on sapphire, or SOS). The choice of insulator depends largely on intended application, with sapphire being used for high-performance radio frequency (RF) and radiation-sensitive applications, and silicon dioxide for diminished short channel effects in microelectronics devices. The insulating layer and topmost silicon layer also vary widely with application. ==Industry need== The implementation of SOI technology is one of several manufacturing strategies employed to allow the continued miniaturization of microelectronic devices, colloquially referred to as extending Moore's Law. Reported benefits of SOI technology relative to conventional silicon (bulk CMOS) processing include:〔 (Silicon-on-insulator - SOI technology and ecosystem - Emerging SOI applications ) by Horacio Mendez, Executive Director of the SOI Industry Consortium, April 9, 2009〕 *''Lower parasitic capacitance'' due to isolation from the bulk silicon, which improves power consumption at matched performance. *''Resistance to latchup'' due to complete isolation of the n- and p-well structures. *Higher performance at equivalent VDD. Can work at low VDD's.〔http://www.infotech-enterprises.com/fileadmin/infotech-enterprises.com/assets/downloads/White_Papers/Infotech_SOI_Paper_Oct_2010.pdf〕 *Reduced temperature dependency due to no doping. *Better yield due to high density, better wafer utilization. *Reduced antenna issues *No body or well taps are needed. *Lower leakage currents due to isolation thus higher power efficiency. *Inherently radiation hardened ( resistant to soft errors ), thus reducing the need for redundancy. From a manufacturing perspective, SOI substrates are compatible with most conventional fabrication processes. In general, an SOI-based process may be implemented without special equipment or significant retooling of an existing factory. Among challenges unique to SOI are novel metrology requirements to account for the buried oxide layer and concerns about differential stress in the topmost silicon layer. The threshold voltage of the transistor depends on the history of operation and applied voltage to it, thus making modeling harder. The primary barrier to SOI implementation is the drastic increase in substrate cost, which contributes an estimated 10–15% increase to total manufacturing costs.〔(IBM touts chipmaking technology )〕 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Silicon on insulator」の詳細全文を読む スポンサード リンク
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